Macromodeling and characterization of filesystem energy consumption for diskless embedded systems

The use and application of embedded systems in everyday life has proliferated in the past few years. These systems are constrained in terms of power consumption, available memory and processing requirements. Typical embedded systems like handheld devices, cell phones, single board computer based systems are diskless and use flash for secondary storage. The choice of filesystem for these diskless systems can greatly impact the performance and the energy consumption of the system as well as lifetime of flash. In this thesis work, the energy consumption of flash based filesystems has been characterized. Both the processor and flash energy consumption are characterized as a function of filesystem specific operations. The work is aimed at helping a system designer compare and contrast different filesystems based on energy consumption as a metric. The macromodel can be used to characterize and estimate the energy consumption of applications due to filesystem running on flash. The study is done on a StrongARM based processor running Linux. Two of the popular filesystems JFFS2 and ext3 are profiled

Performance Improvement of Block Based NAND Flash Translation Layer ABSTRACT

With growing capacities of flash memories, an efficient layer to manage read and write access to flash is required. NFTL is a widely used block based flash translation layer designed to manage NAND flash memories. NFTL is designed to achieve fast write times at the expense of slower read times. While traditionally, it is assumed that the read traffic to secondary storage is insignificant, as reads are cached, we show that this need not be true for NAND flash based storage due to garbage collection and reclamation processes. In this work, we present two independent techniques that extend NFTL and improve the read throughput in particular. The techniques presented add a minimal amount of RAM overhead to a flash controller, while providing, on an average, a 22.9 % improvement in page read times and a 2.6 % improvements in page write times on a set of file system and rigorous synthetic benchmarks. The techniques presented are well suited for flash controllers that are typically space constrained and have minimal processing power

Software virtual memory management for MMU-less embedded systems

For an embedded system designer, the rise in processing speeds of embedded processors and micro-controller evolution has lead to the possibility of running computation and data intensive applications on small embedded devices that earlier only ran on desktop-class systems. From a memory stand point, there is a similar need for running larger and more data intensive applications on embedded devices. However, support for large memory adadress spaces, specifically, virtual memory, for MMU-less em-bedded systems is lacking. In this paper, we present a software virtual memory scheme for MMU-less systems based on an application level virtual memory library and a virtual memory aware assembler. Our virtual memory support is transparent to the programmer, can be tuned for a specific application, correct by construction, and fully automated. Our experiements validate the feasibility of virtual memory for MMU-less embedded systems using benchmark programs

1B-5 System Architecture for Software Peripherals

Abstract — Software peripherals [1] have been proposed as a design alternative to traditional peripherals. We propose a software architecture, design methodology and scheduling scheme for implementing software peripherals on general purpose processors, with fast context switch and high resolution timers. Our design flow automatically generates code for scheduling software peripherals. We demonstrate the feasibility of our proposed work by experimenting with a set of five software peripherals scheduled to execute on a MIPS processor. Our performance evaluations show that the performance impact of the software peripherals on user-level tasks is minimal (i.e., 10.11 % on a 100 MHz processor) – strongly suggesting that with the right architecture, software peripherals can be efficiently accomodated in typical embedded applications. I

POSIX-Compliant Portable Code Synthesis for Embedded Systems

In a large class of embedded systems, dynamic multithreading using traditional OS techniques is infeasible due to memory and processing overheads or lack of operating systems (OS) availability for the target embedded processor. In this work, we propose a source-to-source translator that takes a POSIX compliant multithreaded C program as input and generates an equivalent, embedded processor independent, single threaded ANSI C program, to be compiled using the embedded processor-specific tool chain. The output of our tool is a highly tuned ANSI C program that embodies the applicationspecific embedded scheduler and dynamic multithreading infrastructure along with the user code. In this work, we outline the implementation details of our source-to-source translator and show the feasibility of the proposed technique by comparing execution efficiency to approaches based on Java-VM and traditional UNIX based POSI

FSAF: File System Aware Flash Translation Layer for NAND Flash Memories

NAND Flash Memories require Garbage Collection (GC) and Wear Leveling (WL) operations to be carried out by Flash Translation Layers (FTLs) that oversee flash management. Owing to expensive erasures and data copying, these two operations essentially determine application response times. Since file systems do not share any file deletion information with FTL, dead data is treated as valid by FTL, resulting in significant WL and GC overheads. In this work, we propose a novel method to dynamically interpret and treat dead data at the FTL level so as to reduce above overheads and improve application response times, without necessitating any changes to existing file systems. We demonstrate that our resource-efficient approach can improve application response times and memory write access times by 22% and reduce erasures by 21.6% on average